The ongoing miniaturisation of semiconductor devices has led to a need to miniaturise device packages in ways that do not adversely affect the electrical performance of the device.
In the field of discrete devices this trend has led to chip scale packages (CSPs). This type of package generally includes a semiconductor die having a major surface and a backside. Electrical contacts of the device are provided on the major surface. The package may be surface mounted on a carrier such as a printed circuit by placing it on the carrier with the major surface facing downwards. This may allow the contacts on the major surface to be soldered to corresponding contacts on the carrier. Chip scale packages may use little or no mould compound (encapsulant).